Pop-up Image

Mr.Sateesh Kourav
APID: 7617
capJUNIOR RESEARCH FELLOWSHIP (JRF) at Indian Institute of Information Technology, Design & Manufacturing, Jabalpur JABALPUR, MADHYA PRADESH
Please login
 

Home / APID Profiles

My Biography

As a Junior Research Fellow in the Department of More Electronics and Communication Engineering, I contributed to research projects focused on embedded systems and VLSI design. Master of Technology (M.Tech) in Embedded System & VLSI Design Gyan Ganga Institute of Technology & Sciences (G.G.I.T.S), affiliated with Rajiv Gandhi Proudyogiki Vishwavidyalaya (R.G.P.V.), Bhopal [Year of 2022] Specialized in Embedded Systems and VLSI Design, with a focus on digital electronics, hardware-software integration, and advanced circuit design. Bachelor of Engineering (B.E.) Electronics and Communication Engineering] Gyan Ganga Institute of Technology & Sciences (G.G.I.T.S), affiliated with Rajiv Gandhi Proudyogiki Vishwavidyalaya (R.G.P.V.), Bhopal [Year of 2019] Completed foundational studies in engineering, gaining a broad understanding of electronics, digital systems, and related technologies. Publications: I have published 14 research articles in prestigious national and international journals, demonstrating my expertise and contributions to the field of Embedded Systems and VLSI Design.
Hardware-Software Integration: Skilled in integrating hardware and software components to create efficient and reliable embedded systems.
Programming Languages: Proficient in Verilog and VHDL for hardware description and system design.
Design Tools: Experienced with a variety of design tools, including Diptrace, Origin, Layout Editor, Draw.io, Microsoft Visio, Symicade, and Cadence.

Area Of Expertise

Electronics

Area of Intrest

FPGA

Honors and Awards

User has not updated his/her Awards & Honors.

Career Timeline

Academic Identity

User not updated academic id.

Project: An ASIC design of Area and Speed Efficient Floating-Point Arithmetic and Logical Unit Implementation on Hybrid FPGAs
Goal: Area and Speed Efficient ALU
Current Stage: completed
Starting Date: 13/05/2020
Sponsored by: GGITS
Projects
User has not updated his/her Conferences.

Feed

Dr. Nagendra Pratap Singh

I am Dr. Nagendra Pratap Singh and working as Chief Technology Officer at humanoid robotic company Read More Eagle Robot Lab Bangalore. We build humanoid robots for education and learning purposes.
Like: 0

#Apid #Academic #researchers #scholars #academicians #students

VENKATA SIVA KUMAR PASUPULETI

hi i am Dr. P.V.Siva Kumar from Hyderabad, India

Like: 0

#Apid #Academic #researchers #scholars #academicians #students

Nagaraj Sitaram

My recent research work relates to water saving devices, Hydraulic research in multiple stage Read More orifice plates, Computational Fluid dynamics for Pipe flow, Pumps and hydraulic machinery
Like: 0

#Apid #Academic #researchers #scholars #academicians #students

sowmya hulivahana nagaraju

In my recent work, I have been focused on several key areas related to environmental sustainability. Read More First, I’ve been working on improving air quality through research and initiatives aimed at reducing air pollution sources, enhancing monitoring systems, and promoting cleaner technologies. This work is crucial in mitigating the adverse health effects of poor air quality and reducing greenhouse gas emissions.
Second, I’ve been involved in water and wastewater treatment projects, aiming to develop more efficient and eco-friendly treatment methods. By optimizing these processes, we can ensure the availability of clean water resources while minimizing the environmental impact of wastewater discharge.
Furthermore, I’ve been actively engaged in environmental impact assessments (EIAs) for various projects. These assessments are essential in identifying potential environmental risks and proposing mitigation measures, ultimately helping to strike a balance between development and conservation.
Like: 0

#Apid #Academic #researchers #scholars #academicians #students

Drparesh Shah

I have done major post doctoral study in accounting, results in to Modern Approach of Accountng. Read More Finance, Accounts, Management Accounting and Control, Economics, Econometrics, Financial Modelling, Life science and social based economics are interest area.
Like: 0

#Apid #Academic #researchers #scholars #academicians #students

Sadeq Damrah

Mathematical research adds value to various areas of research.

Like: 0

#Apid #Academic #researchers #scholars #academicians #students

Sadeq Damrah

I am interested in applications of mathematics in practical engineering situations.

Like: 0

#Apid #Academic #researchers #scholars #academicians #students

Umer Farooq

Hi! I am a researcher in the field of cyber security, has made significant contributions during his Read More Ph.D. research work. My work focuses on addressing critical challenges in cyber security, with a particular emphasis on developing innovative solutions to enhance network security, mitigate internal threats, and strengthen the resilience of systems in the face of emerging threats. My research has been published in respected journals and conferences, contributing valuable insights to the ever-evolving field of cyber security.
Like: 0

#Apid #Academic #researchers #scholars #academicians #students

Dr. Mahadeb Rana

Hi, This is Dr. Mahadeb Rana have been working as a Librarian of Kalyani Government Engineering Read More College, Kalyani, Nadia, West Bengal, India since September, 1997 under WBGS cadre. Before joining, I served the Jadavpur University Central Library as an Assistant Librarian Gr. II from July, 1993 to September, 1997. I would like to learn and to be associated with LIS field which will be beneficial to the library fraternity. Thanks a lot.
Like: 0

#Apid #Academic #researchers #scholars #academicians #students

Dr Sunil Misal

I had worked as Reviewer for the International Journal i.e. Control Engineering Practice.

Like: 0

#Apid #Academic #researchers #scholars #academicians #students

User has not Posted Anything.

Publications

Project: An ASIC design of Area and Speed Efficient Floating-Point Arithmetic and Logical Unit Implementation on Hybrid FPGAs
Goal: Area and Speed Efficient ALU
Current Stage: completed
Starting Date: 13/05/2020
Sponsored by: GGITS
Projects

User has not updated his/her Conferences.

Editorial Roles
Electronics & Telecommunication Engineering

No Reviewing details added by the User