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Mr.Sateesh Kourav
APID: 7617
capJUNIOR RESEARCH FELLOWSHIP (JRF) at Indian Institute of Information Technology, Design & Manufacturing, Jabalpur JABALPUR, MADHYA PRADESH
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My Biography

As a Junior Research Fellow in the Department of More Electronics and Communication Engineering, I contributed to research projects focused on embedded systems and VLSI design. Master of Technology (M.Tech) in Embedded System & VLSI Design Gyan Ganga Institute of Technology & Sciences (G.G.I.T.S), affiliated with Rajiv Gandhi Proudyogiki Vishwavidyalaya (R.G.P.V.), Bhopal [Year of 2022] Specialized in Embedded Systems and VLSI Design, with a focus on digital electronics, hardware-software integration, and advanced circuit design. Bachelor of Engineering (B.E.) Electronics and Communication Engineering] Gyan Ganga Institute of Technology & Sciences (G.G.I.T.S), affiliated with Rajiv Gandhi Proudyogiki Vishwavidyalaya (R.G.P.V.), Bhopal [Year of 2019] Completed foundational studies in engineering, gaining a broad understanding of electronics, digital systems, and related technologies. Publications: I have published 14 research articles in prestigious national and international journals, demonstrating my expertise and contributions to the field of Embedded Systems and VLSI Design.
Hardware-Software Integration: Skilled in integrating hardware and software components to create efficient and reliable embedded systems.
Programming Languages: Proficient in Verilog and VHDL for hardware description and system design.
Design Tools: Experienced with a variety of design tools, including Diptrace, Origin, Layout Editor, Draw.io, Microsoft Visio, Symicade, and Cadence.

Area Of Expertise

Electronics

Area of Intrest

FPGA

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Career Timeline

Academic Identity

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Project: An ASIC design of Area and Speed Efficient Floating-Point Arithmetic and Logical Unit Implementation on Hybrid FPGAs
Goal: Area and Speed Efficient ALU
Current Stage: completed
Starting Date: 13/05/2020
Sponsored by: GGITS
Projects
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My Current Area of Research is related to Mechatronics Systems, Robotics Applications in Various Read More Fields.
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My scholar has been awarded P.hd

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Bhanu Sridhar Mantravadi

Hello researchers! I have published many papers in different journals and conferences including Read More Scopus listed journals and IEEE xplore. I also reviewed and edited more than 250-300 papers in different conferences/journals. I wish to discuss with you about every change that comes up in our basic field – Computer Science.
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Rahul Adhikary

I am a passionate researcher and Associate Professor in Soil Science, School of agriculture with 10 Read More years plus experience. Interested to collaborate with other researchers for better publication and research.
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Preeti Desai

The area of my research is Corporate Governance, CSR, Ethics, Bhavioural finance and inclusion

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Dr. Shalmali Gadge

The area of my research is Human Resource Management , Organizational culture and organizational Read More development .
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DR. SANJOY KUMAR BORDOLUI

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Publications

Project: An ASIC design of Area and Speed Efficient Floating-Point Arithmetic and Logical Unit Implementation on Hybrid FPGAs
Goal: Area and Speed Efficient ALU
Current Stage: completed
Starting Date: 13/05/2020
Sponsored by: GGITS
Projects

User has not updated his/her Conferences.

Editorial Roles
Electronics & Telecommunication Engineering

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